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AgeCommit message (Expand)Author
2023-02-04allowing for control signals with differnet widthjjsuperpower
2023-01-24working on reading control lines from csvjjsuperpower
2023-01-24fixed shift with number greater than 32jjsuperpower
2023-01-22moving machine codes to central filejjsuperpower
2023-01-22miscjjsuperpower
2023-01-22added rtlil exportjjsuperpower
2022-10-21added low and high multiplyjjsuperpower
2022-10-21added low and high multiplyjjsuperpower
2022-10-21added jump always, match ISAjjsuperpower
2022-10-21added enum, updated to ISAjjsuperpower
2022-10-21incremental updatejjsuperpower
2022-10-13started op codes filejjsuperpower
2022-10-13started on controljjsuperpower
2022-10-13misc ( I forgot, ok)jjsuperpower
2022-09-24fixed some ugly codejjsuperpower
2022-09-17finished testing jump controljjsuperpower
2022-09-17made reg more modularjjsuperpower
2022-09-17added random testingjjsuperpower
2022-09-06started on jump_ctl blockjjsuperpower
2022-09-06patched security holes UNTESTEDjjsuperpower
2022-09-06consolidated aluflagsjjsuperpower
2022-09-06updated templatejjsuperpower
2022-09-05fixed tb for shiftregjjsuperpower
2022-09-05honestly i don't know what I didjjsuperpower
2022-09-05moveing file aroundjjsuperpower
2022-09-05updated testbench formatjjsuperpower
2022-09-05Restructuring and organizingjjsuperpower
2022-08-30reorganized hdljjsuperpower
2022-08-29fixed parity checkjjsuperpower
2022-08-27register partially testedjjsuperpower
2022-08-27moved interupt control outside regjjsuperpower
2022-08-27coded but not tested Register filejjsuperpower
2022-08-24added odd flag bitjjsuperpower
2022-08-24Update ALU, added more opsjjsuperpower
2022-08-23Update the ISA specificationsDanny Holman
2022-08-21minor changejjsuperpower
2022-08-21basic alu coded and testedjjsuperpower
2022-08-15updated ISAjjsuperpower
2022-08-15added templatejjsuperpower
2022-08-10added make filejjsuperpower
2022-08-07basic shift register workingjjsuperpower
2022-08-04Updated .gitignorejjsuperpower
2022-08-04deprecated all myhdl stuff, moving to Amaranthjjsuperpower
2022-08-02Uploading to remotejjsuperpower
2022-06-29fixed shift_reg for exportjjsuperpower
2022-06-28vcd file working for cosimjjsuperpower
2022-06-28added template, ResetSyncjjsuperpower
2022-06-26added templatejjsuperpower
2022-06-26restructured folderjjsuperpower
2022-06-26shift_reg donejjsuperpower
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