diff options
author | jjsuperpower <jjs29356@gmail.com> | 2022-06-26 09:26:20 -0500 |
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committer | jjsuperpower <jjs29356@gmail.com> | 2022-06-26 09:26:20 -0500 |
commit | f4407898d3d74be98cdf1a0308c779cd842364ab (patch) | |
tree | 9e17c6560543b3c657e3f79836bb37222e8c4bea /hdl/testing/simulation/ShiftReg_sim.vcd | |
parent | af47ba80d5db24163feb378c52a20639e2532580 (diff) |
shift_reg done
Diffstat (limited to 'hdl/testing/simulation/ShiftReg_sim.vcd')
-rw-r--r-- | hdl/testing/simulation/ShiftReg_sim.vcd | 147 |
1 files changed, 0 insertions, 147 deletions
diff --git a/hdl/testing/simulation/ShiftReg_sim.vcd b/hdl/testing/simulation/ShiftReg_sim.vcd deleted file mode 100644 index 059b493..0000000 --- a/hdl/testing/simulation/ShiftReg_sim.vcd +++ /dev/null @@ -1,147 +0,0 @@ -$date - Fri Jun 24 11:32:38 2022 -$end -$version - MyHDL 0.11 -$end -$timescale - 1ns -$end - -$scope module tb $end -$var reg 1 ! left_right $end -$var reg 1 " clk $end -$var real 1 # in0 $end -$var reg 8 $ out0 $end -$var reg 1 % reset $end -$scope module ShiftReg0 $end -$var reg 1 % reset $end -$var reg 1 " clk $end -$var real 1 # in0 $end -$var reg 1 ! left_right $end -$var reg 8 $ out0 $end -$upscope $end -$upscope $end - -$enddefinitions $end -$dumpvars -0! -0" -s0 # -b00000000 $ -0% -$end -#2 -1" -#3 -#4 -0" -1% -#6 -1" -#7 -#8 -0" -s1 # -#10 -1" -b00000001 $ -#11 -#12 -0" -#14 -1" -b00000011 $ -#15 -#16 -0" -#18 -1" -b00000111 $ -#19 -#20 -0" -#22 -1" -b00001111 $ -#23 -#24 -0" -#26 -1" -b00011111 $ -#27 -#28 -0" -#30 -1" -b00111111 $ -#31 -#32 -0" -#34 -1" -b01111111 $ -#35 -#36 -0" -#38 -1" -b11111111 $ -#39 -#40 -0" -#42 -1" -#43 -#44 -0" -s0 # -#46 -1" -b11111110 $ -#47 -#48 -0" -#50 -1" -b11111100 $ -#51 -#52 -0" -#54 -1" -b11111000 $ -#55 -#56 -0" -#58 -1" -b11110000 $ -#59 -#60 -0" -#62 -1" -b11100000 $ -#63 -#64 -0" -#66 -1" -b11000000 $ -#67 -#68 -0" -#70 -1" -b10000000 $ -#71 -#72 -0" -#74 -1" -b00000000 $ -#75 -#76 -0" |