diff options
author | jjsuperpower <jjs29356@gmail.com> | 2022-08-10 22:16:20 -0500 |
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committer | jjsuperpower <jjs29356@gmail.com> | 2022-08-10 22:16:20 -0500 |
commit | c3fbef6e64506057e832334e1dfa26efde67777e (patch) | |
tree | 3e0ef3cdfd3f6830832cc53102b38df5be95cb12 /hdl/utils.py | |
parent | 965821b9bcf018173e0a60f49382568724a5b589 (diff) |
added make file
Diffstat (limited to 'hdl/utils.py')
-rw-r--r-- | hdl/utils.py | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/hdl/utils.py b/hdl/utils.py new file mode 100644 index 0000000..6aad95f --- /dev/null +++ b/hdl/utils.py @@ -0,0 +1,22 @@ +import sys +from typing import Callable +from amaranth import Elaboratable +from amaranth.back import verilog, cxxrtl + +def cmd(hdl, tb:Callable): + if len(sys.argv) <= 1: + exit() + + if sys.argv[1] == "sim": + tb(sys.argv[0].replace('.py', '.vcd')) + exit() + + if sys.argv[1] == "v": + out = verilog.convert(hdl, ports=hdl.ports) + with open(sys.argv[0].replace('.py', '.v'), 'w') as f: + f.write(out) + + elif sys.argv[1] == "cc": + out = cxxrtl.convert(hdl, ports=hdl.ports) + with open(sys.argv[0].replace('.py', '.cc'), 'w') as f: + f.write(out)
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