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-rw-r--r--hdl_lab/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/hdl_lab/Makefile b/hdl_lab/Makefile
index c40b1cf..a85bbd8 100644
--- a/hdl_lab/Makefile
+++ b/hdl_lab/Makefile
@@ -10,4 +10,4 @@ test-w:
py.test -v $(HDL)
clean:
- $(RM) -rf simulation/* gen_verilog/* __pycache__/* .pytest_cache/* \ No newline at end of file
+ $(RM) -rf simulation/* gen_verilog/* hdl/__pycache__/* .pytest_cache/* \ No newline at end of file