diff options
| -rw-r--r-- | .vscode/dryrun.log | 4 | ||||
| -rw-r--r-- | .vscode/targets.log | 58 | ||||
| -rw-r--r-- | doc/DJ-ISA_rev_0.0.3.md | 174 | ||||
| -rw-r--r-- | doc/DJ-ISA_rev_0.0.4.md | 222 | ||||
| -rw-r--r-- | hdl_lab.tar.gz | bin | 19335 -> 0 bytes |
5 files changed, 248 insertions, 210 deletions
diff --git a/.vscode/dryrun.log b/.vscode/dryrun.log index 927972b..3881c00 100644 --- a/.vscode/dryrun.log +++ b/.vscode/dryrun.log @@ -1,6 +1,6 @@ make --dry-run --always-make --keep-going --print-directory -make: Entering directory '/home/jon/Downloads/vertex-isa' -make: Leaving directory '/home/jon/Downloads/vertex-isa' +make: Entering directory '/home/jon/Desktop/vertex-isa' +make: Leaving directory '/home/jon/Desktop/vertex-isa' make: *** No targets specified and no makefile found. Stop. diff --git a/.vscode/targets.log b/.vscode/targets.log index 22515f1..8d229d8 100644 --- a/.vscode/targets.log +++ b/.vscode/targets.log @@ -1,4 +1,6 @@ make all --print-data-base --no-builtin-variables --no-builtin-rules --question +make: *** No rule to make target 'all'. Stop. + # GNU Make 4.3 # Built for x86_64-suse-linux-gnu # Copyright (C) 1988-2020 Free Software Foundation, Inc. @@ -6,7 +8,7 @@ make all --print-data-base --no-builtin-variables --no-builtin-rules --question # This is free software: you are free to change and redistribute it. # There is NO WARRANTY, to the extent permitted by law. -# Make data base, printed on Wed Jun 22 09:25:58 2022 +# Make data base, printed on Tue Jul 12 16:08:18 2022 # Variables @@ -23,11 +25,11 @@ NO_AT_BRIDGE = 1 # environment GTK_RC_FILES = /etc/gtk/gtkrc:/home/jon/.gtkrc:/home/jon/.config/gtkrc # environment -VSCODE_IPC_HOOK_EXTHOST = /run/user/1000/vscode-ipc-1d294c6c-3d2e-413d-a467-1ad34d3e6ef7.sock +VSCODE_IPC_HOOK_EXTHOST = /run/user/1000/vscode-ipc-8ba0b406-073e-4b22-8841-c9e54f6e5bbb.sock # environment WINDOWMANAGER = /usr/bin/startplasma-x11 # environment -VSCODE_CWD = /home/jon +VSCODE_CWD = /home/jon/Desktop # environment GPG_TTY = not a tty # environment @@ -43,7 +45,7 @@ VSCODE_HANDLES_UNCAUGHT_ERRORS = true # default .VARIABLES := # environment -PWD = /home/jon/Downloads/vertex-isa +PWD = /home/jon/Desktop/vertex-isa # environment HOST = WarpDrive # automatic @@ -67,7 +69,7 @@ QML_XHR_ALLOW_FILE_READ = 1 # automatic %F = $(notdir $%) # environment -VSCODE_CODE_CACHE_PATH = /home/jon/.config/Code/CachedData/dfd34e8260c270da74b5c2d86d61aee4b6d56977 +VSCODE_CODE_CACHE_PATH = /home/jon/.config/Code/CachedData/30d9c6cd9483b2cc586687151bcbcd635f373630 # environment XDG_SESSION_PATH = /org/freedesktop/DisplayManager/Session0 # environment @@ -77,7 +79,7 @@ SSH_ASKPASS = /usr/libexec/ssh/ssh-askpass # environment LANG = C # environment -XAUTHORITY = /run/user/1000/xauth_wDskWU +XAUTHORITY = /run/user/1000/xauth_nVmigp # environment MANPATHISSET = yes # default @@ -89,7 +91,7 @@ FROM_HEADER = # makefile MAKEFLAGS = pqrR # makefile -CURDIR := /home/jon/Downloads/vertex-isa +CURDIR := /home/jon/Desktop/vertex-isa # environment VSCODE_PIPE_LOGGING = true # environment @@ -101,7 +103,7 @@ LESSOPEN = lessopen.sh %s # environment MFLAGS = -pqrR # environment -SSH_AUTH_SOCK = /tmp/ssh-XXXXXX3qXqxT/agent.1648 +SSH_AUTH_SOCK = /tmp/ssh-XXXXXXWmaaD6/agent.1726 # default .SHELLFLAGS := -c # environment @@ -123,7 +125,7 @@ MAKEFILE_LIST := # environment VSCODE_VERBOSE_LOGGING = true # environment -VSCODE_PID = 12064 +VSCODE_PID = 13234 # environment XDG_SESSION_TYPE = x11 # environment @@ -135,7 +137,7 @@ INPUT_METHOD = ibus # environment SDK_HOME = /usr/lib64/jvm/java # environment -SESSION_MANAGER = local/WarpDrive:@/tmp/.ICE-unix/2157,unix/WarpDrive:/tmp/.ICE-unix/2157 +SESSION_MANAGER = local/WarpDrive:@/tmp/.ICE-unix/2128,unix/WarpDrive:/tmp/.ICE-unix/2128 # automatic *F = $(notdir $*) # environment @@ -143,7 +145,7 @@ MANPATH = /home/jon/.local/share/man:/usr/local/man:/usr/local/share/man:/usr/sh # environment CHROME_DESKTOP = code-url-handler.desktop # environment -DBUS_SESSION_BUS_ADDRESS = unix:abstract=/tmp/dbus-wAQvM73TPv,guid=5b1fa7134ecbc4a9f950969962b28466 +DBUS_SESSION_BUS_ADDRESS = unix:abstract=/tmp/dbus-VuECYAsv8Q,guid=43af897343923b762601070262c82d19 # automatic <D = $(patsubst %/,%,$(dir $<)) # environment @@ -165,8 +167,6 @@ MAKECMDGOALS := all # environment XMODIFIERS = @im=ibus # environment -PLATFORMIO_CALLER = vscode -# environment SHLVL = 0 # environment MAKELEVEL := 0 @@ -201,8 +201,6 @@ XSESSION_IS_UP = yes # environment GTK_IM_MODULE = ibus # environment -NO_PROXY = 127.0.0.1 -# environment XDG_CURRENT_DESKTOP = KDE # environment HOSTTYPE = x86_64 @@ -231,8 +229,6 @@ AUDIODRIVER = pulseaudio # environment G_FILENAME_ENCODING = @locale,UTF-8,ISO-8859-15,CP1252 # environment -PLATFORMIO_PATH = /home/jon/.platformio/python3/bin:/home/jon/.local/bin:/usr/local/bin:/usr/bin:/bin:/opt/cross/bin -# environment XDG_VTNR = 7 # makefile .DEFAULT_GOAL := @@ -247,9 +243,7 @@ MAKE_VERSION := 4.3 # environment KDE_SESSION_UID = 1000 # environment -DEBUGINFOD_URLS = https://debuginfod.opensuse.org/ -# environment -SSH_AGENT_PID = 1825 +SSH_AGENT_PID = 1895 # environment PAGER = less # environment @@ -263,8 +257,6 @@ XDG_SESSION_CLASS = user # environment VSCODE_AMD_ENTRYPOINT = vs/workbench/api/node/extensionHostProcess # environment -PLATFORMIO_IDE = 2.4.3 -# environment XKEYSYMDB = /usr/X11R6/lib/X11/XKeysymDB # environment GTK2_RC_FILES = /etc/gtk-2.0/gtkrc:/home/jon/.gtkrc-2.0:/home/jon/.config/gtkrc-2.0 @@ -279,14 +271,11 @@ JDK_HOME = /usr/lib64/jvm/java # environment ELECTRON_RUN_AS_NODE = 1 # environment -VSCODE_IPC_HOOK = /run/user/1000/vscode-74f3b1db-1.66.2-main.sock +VSCODE_IPC_HOOK = /run/user/1000/vscode-74f3b1db-1.68.1-main.sock # environment TERM = xterm # environment XDG_SESSION_ID = 1 - -make: *** No rule to make target 'all'. Stop. - # environment XCURSOR_SIZE = 24 # environment @@ -301,6 +290,7 @@ SUFFIXES := QT_AUTO_SCREEN_SCALE_FACTOR = 0 # environment LS_OPTIONS = -N --color=tty -T 0 + # environment KDE_SESSION_VERSION = 5 # default @@ -312,7 +302,7 @@ KDE_FULL_SESSION = true # environment JRE_HOME = /usr/lib64/jvm/java # variable set hash-table stats: -# Load=149/1024=15%, Rehash=0, Collisions=15/176=9% +# Load=144/1024=14%, Rehash=0, Collisions=14/171=8% # Pattern-specific Variable Values @@ -320,9 +310,9 @@ JRE_HOME = /usr/lib64/jvm/java # Directories -# . (device 65025, inode 21757987): 7 files, no impossibilities. +# . (device 65025, inode 21757987): 8 files, no impossibilities. -# 7 files, no impossibilities in 1 directories. +# 8 files, no impossibilities in 1 directories. # Implicit Rules @@ -372,12 +362,12 @@ GNUmakefile: # No general ('VPATH' variable) search path. -# strcache buffers: 1 (0) / strings = 15 / storage = 122 B / avg = 8 B -# current buf: size = 8162 B / used = 122 B / count = 15 / avg = 8 B +# strcache buffers: 1 (0) / strings = 16 / storage = 141 B / avg = 8 B +# current buf: size = 8162 B / used = 141 B / count = 16 / avg = 8 B -# strcache performance: lookups = 18 / hit rate = 16% +# strcache performance: lookups = 19 / hit rate = 15% # hash-table stats: -# Load=15/8192=0%, Rehash=0, Collisions=0/18=0% -# Finished Make data base on Wed Jun 22 09:25:58 2022 +# Load=16/8192=0%, Rehash=0, Collisions=0/19=0% +# Finished Make data base on Tue Jul 12 16:08:19 2022 diff --git a/doc/DJ-ISA_rev_0.0.3.md b/doc/DJ-ISA_rev_0.0.3.md deleted file mode 100644 index f8c85a3..0000000 --- a/doc/DJ-ISA_rev_0.0.3.md +++ /dev/null @@ -1,174 +0,0 @@ -# Vertex KISS 48 - Machine Code Spec - -## General Instruction Format - X = HEX - B = BIN - - d = HEX (not used / don't care) - - MAX INSTRUCTIIONS = 256 - ALL INSTRUCTIONS ARE ATOMIC - -### C-Type, Control - XX XX XX XXXXXX - Opcode dd RS1 Address/IMM - -### I-Type, Immediate - XX XX XX XXXXXX - Opcode RD RS IMM - -### R-Type, Arithmetic - XX XXXX XX XX XX - Opcode dddd RD RS1 RS2 - -### J-Type, Jump / Branch - XX XX XXXX XXXX - Opcode dd Address (XX * 2^32 + XXXX) - -## Registers - Maximum registers = 16 - Register width = 32 - All are R/W except 0X - - 0X Always Zero - AX GP-0 - BX GP-1 - CX GP-2 - DX GP-3 - EX GP-4 - FX GP-5 - GX GP-6 - FX GP-7 - HI Mult/Div Hi - LO Mult/Div Lo - FLG Processor Flags - CRX Control register (Writable only in supervisor mode) - IP Instruction Pointer - SP Stack Pointer - - -### FLG Register Bitfield - These registers are Read/Write - - NOTE: - I think this is needed in order to restore from interupt, if this is not true, then I propose the - bottom half be read only and the top half be read / write. Then just re-assign the registers to differnt locations - - FLG[0] Carry - FLG[1] Overflow - FLG[2] Zero - FLG[3] Sign - FLG[4]* Interrupt Enable - FLG[5]* User Mode - FLG[6-31] RESERVED - -*To be moved to control register* - -## Integer Instructions - -### R-Type - ADD RD, RS1, RS2 RD = RS1 + RS2 - SUB RD, RS1, RS2 RD = RS1 - RS2 - XOR RD, RS1, RS2 RD = RS1 ^ RS2 - OR RD, RS1, RS2 RD = RS1 | RS2 - AND RD, RS1, RS2 RD = RS1 & RS2 - LSL RD, RS1, RS2 RD = RS1 << RS2 (logical) - LSR RD, RS1, RS2 RD = RS1 >> RS2 (logical) - ASR RD, RS1, RS2 RD = RS1 >> RS2 - MUL RD, RS1, RS2 HI,LO = RS1 * RS2 - MULU RD, RS1, RS2 HI,LO = RS1 * RS2 - DIV RD, RS1, RS2 HI,LO = RS1 / RS2 - DIVU RD, RS1, RS2 HI,LO = RS1 / RS2 (unsigned) - - LDB RD, RS1, RS2 RD = &(RS1 + RS2) Load Byte - STB RD, RS1, RS2 &(RS1 + RS2) = (RD >> 24) Store Byte - LDW RD, RS1, RS2 RD = &(RS1 + RS2) Load Word (4 bytes) - STW RD, RS1, RS2 &(RS1 + RS2) = RD Store Word (4 bytes) - - -### I-Type - ADDI RD, RS, IMM RD = RS + IMM - SUBI RD, RS, IMM RD = RS - IMM - XORI RD, RS, IMM RD = RS ^ IMM - ORI RD, RS, IMM RD = RS | IMM - ANDI RD, RS, IMM RD = RS & IMM - LSLI RD, RS, IMM RD = RS << IMM (logical) - LSRI RD, RS, IMM RD = RS >> IMM (logical) - ASRI RD, RS, IMM RD = RS >> IMM - MULI dd, RS, IMM HI,LO = RS * IMM - MULIU dd, RS, IMM HI,LO = RS * IMM - DIVI dd, RS, IMM HI,LO = RS / IMM - DIVIU dd, RS, IMM HI,LO = RS / IMM (unsigned) - - LDBI RD, RS, RS2 RD = &(RS + IMM) Load Byte - STBI RD, RS, RS2 &(RS + IMM) = (RD >> 24) Store Byte - LDWI RD, RS, RS2 RD = &(RS + IMM) Load Word (4 bytes) - STWI RD, RS, RS2 &(RS + IMM) = RD Store Word (4 bytes) - - -### Jump Instructions - JMP ADDR IP = ADDR - JEQ ADDR if (FLG.ZERO == 1) IP = ADDR - JLT ADDR if (FLG.SIGN == 0) IP = ADDR - JGT* ADDR if (FLG.SIGN == 1) IP = ADDR - JLE ADDR if (FLG.ZERO == 1 & FLG.SIGN == 0) IP = ADDR - JGE ADDR if (FLG.ZERO == 1 & FLG.SIGN == 1) IP = ADDR - JLTU ADDR if (FLG.OVERFLOW == 1) IP = ADDR - JGTU ADDR if (FLG.OVERFLOW == 0) IP = ADDR - JLEU* ADDR if (FLG.ZERO == 1 & FLG.SIGN == 0) IP = ADDR - JGEU* ADDR if (FLG.ZERO == 1 & FLG.SIGN == 1) IP = ADDR - -*Duplicate OP code* - -### Control Instructions - NOP Do nothing -> opcode = ZERO - PUSHR RS SP+=4;SP = RS - POPR RS RS = SP;SP-=4 - PUSHI IMM SP+=4;SP = IMM - INVP IMM Invalidate entry in TLB - RET POPR BX;JMP BX - CALL IMM PUSHI $;JMP ADDR - INT IMM PUSHR SP;PUSHR FLG;PUSHR IP;PUSHI errno;IP = IDT[IMM] - IRET POPR IP;POPR FLG;POPR SP - SIF Set interrupt flag - CIF Clear interrupt flag - -## Interrupt Descriptor Table -This will be in a fixed memory location, this will contain pointers to the interupt function. Once an interupt is entered, all interupts are turned off. - - IDT[0] Divide-by-zero exception - IDT[1] Hardware error (NMI) - IDT[2] Overflow - IDT[3] Invalid Opcode - IDT[4] General-protection fault - IDT[5] Page fault - IDT[6-15] RESERVED - - IDT[16-255] Platform interrupts (PIC, hard drive, keyboard, etc.) - IDT[80] Software interrupt (reserved for OS) - - - - - - - - - - -## Page Directory - -The page directory contains 1024 page tables that have 1024 entries. - -### Page table layout - -PT[0] Present -PT[1] R/W -PT[2] User-mode -PT[3-4] RESERVED -PT[5] Accessed -PT[6-7] RESERVED -PT[8-31] Physical address of page table (XX * 2^16 + XXXX) - - *This is still WIP but I wanted to get your input on the layout. I also have - the jank memory offset that will more than likely change.* diff --git a/doc/DJ-ISA_rev_0.0.4.md b/doc/DJ-ISA_rev_0.0.4.md new file mode 100644 index 0000000..8c7266d --- /dev/null +++ b/doc/DJ-ISA_rev_0.0.4.md @@ -0,0 +1,222 @@ +# Vertex KISS 32 - Machine Code Spec +^ So Vertex is already a name for an FPGA, should we change this? +I propose a different name: + + ASAP Soc 32 a KISS architecture + + As + Simple + As + Possible + +## General Instruction Format + X = HEX + B = BIN + + d = HEX (not used / don't care) + + MAX INSTRUCTIIONS = 256 + ALL INSTRUCTIONS ARE ATOMIC + + ALL MEMORY ADDRESSES ARE 32-bit, not 8-bit + ^ What do you think about this? 32 bits is usually and 'int' in C + This would extend the address space, kinda + + Also I have been reading about caching, I think the instruction width needs to be the same as the data memory + +### C-Type, Control + XX X XXXXX + Opcode RS1 IMM + +### I-Type, Immediate + XX X X XXXX + Opcode RD RS IMM + +### R-Type, Arithmetic + XX X X X XXX + Opcode RD RS1 RS2 ddd + +### JR-Type, Compare and Jump + XX X X X XXX + Opcode Jump Condition RS1 RS2 ddd + +### JI-Type, Compare and Jump + XX X X XXXX + Opcode Jump Condition RS1 IMM + +## Registers + Maximum registers = 16 + Register width = 32 + All are R/W except 0X + + 0X Always Zero + AX GP-0 + BX GP-1 + CX GP-2 + DX GP-3 + EX GP-4 + FX GP-5 + GX GP-6 + FX GP-7 + HI Mult/Div Hi + LO Mult/Div Lo + FLG Processor Flags + CRX Control register (Writable only in supervisor mode) + IP Instruction Pointer + SP Stack Pointer + JMP Jump Address + + ^ I have added this, it is part of my proposal for changing how jumps work + + +### FLG Register Bitfield + These registers are Read/Write + + FLG[0] Carry + FLG[1] Overflow + FLG[2] Zero + FLG[3] Sign + FLG[4]* Interrupt Enable + FLG[5]* User Mode + FLG[6-31] RESERVED + +*To be moved to control register* + +## Integer Instructions + +### R-Type + ADD RD, RS1, RS2 RD = RS1 + RS2 + SUB RD, RS1, RS2 RD = RS1 - RS2 + XOR RD, RS1, RS2 RD = RS1 ^ RS2 + OR RD, RS1, RS2 RD = RS1 | RS2 + AND RD, RS1, RS2 RD = RS1 & RS2 + LSL RD, RS1, RS2 RD = RS1 << RS2 (logical) + LSR RD, RS1, RS2 RD = RS1 >> RS2 (logical) + ASR RD, RS1, RS2 RD = RS1 >> RS2 + MUL RD, RS1, RS2 HI,LO = RS1 * RS2 + MULU RD, RS1, RS2 HI,LO = RS1 * RS2 + DIV RD, RS1, RS2 HI,LO = RS1 / RS2 + DIVU RD, RS1, RS2 HI,LO = RS1 / RS2 (unsigned) + + #LDB RD, RS1, RS2 RD = &(RS1 + RS2) Load Byte + #STB RD, RS1, RS2 &(RS1 + RS2) = (RD >> 24) Store Byte + LDW RD, RS1, RS2 RD = &(RS1 + RS2) Load Word (4 bytes) + STW RD, RS1, RS2 &(RS1 + RS2) = RD Store Word (4 bytes) + + # Depricated? + + +### I-Type + ADDI RD, RS, IMM RD = RS + IMM + SUBI RD, RS, IMM RD = RS - IMM + XORI RD, RS, IMM RD = RS ^ IMM + ORI RD, RS, IMM RD = RS | IMM + ANDI RD, RS, IMM RD = RS & IMM + LSLI RD, RS, IMM RD = RS << IMM (logical) + LSRI RD, RS, IMM RD = RS >> IMM (logical) + ASRI RD, RS, IMM RD = RS >> IMM + MULI dd, RS, IMM HI,LO = RS * IMM + MULIU dd, RS, IMM HI,LO = RS * IMM + DIVI dd, RS, IMM HI,LO = RS / IMM + DIVIU dd, RS, IMM HI,LO = RS / IMM (unsigned) + + #LDBI RD, RS, RS2 RD = &(RS + IMM) Load Byte + #STBI RD, RS, RS2 &(RS + IMM) = (RD >> 24) Store Byte + LDWI RD, RS, RS2 RD = &(RS + IMM) Load Word (4 bytes) + STWI RD, RS, RS2 &(RS + IMM) = RD Store Word (4 bytes) + + # Depricated? + + +### JR Instructions + Compare and then jump (IP = JMP) + + JMP 0 if (True) + JMP 1 if (RS1 != RS2) + JMP 2 if (RS1 == RS2) + JMP 3 if (RS1 > RS2) Unsigned + JMP 4 if (RS1 >= RS2) Unsigned + + JMP C if (RS1 > RS2) Signed + JMP D if (RS1 >= RS2) Signed + +### JI Instructions + Compare and then jump (IP = JMP) + + JMPI 0 if (True) + JMPI 1 if (RS1 != IMM) + JMPI 2 if (RS1 == IMM) + JMPI 3 if (RS1 > IMM) Unsigned + JMPI 4 if (RS1 >= IMM) Unsigned + + JMPI C if (RS1 > IMM) Signed + JMPI D if (RS1 >= IMM) Signed + +### Jump Aliases + + JEQ + JLT + JGT + JLE + JGE + JLTU + JGTU + JLEU + JGEU + + +### Control Instructions + NOP Do nothing -> opcode = ZERO + PUSHR RS SP+=1 ;*SP = RS + POPR RS RS = *SP ;SP-=1 + PUSHA PUSHR AX, BX, CX, DX, EX, FX, GX, FX, HI, LO, FLG, CRX, IP, SP, JMP + POPA POP reverse PUSHR, SP not affected + PUSHI IMM SP+=1 ;*SP = IMM + INVP IMM Invalidate entry in TLB + RET POPR IP; + CALL PUSHR IP; IP = JMP; + INT PUSHA ;IP = IDT[IMM] + IRET POPR FLG; POPR SP; POPR IP + SIF Set interrupt flag + CIF Clear interrupt flag + +## Interrupt Descriptor Table +This will be in a fixed memory location, this will contain pointers to the interupt function. Once an interupt is entered, all interupts are turned off. + + IDT[0] Divide-by-zero exception + IDT[1] Hardware error (NMI) + IDT[2] Overflow + IDT[3] Invalid Opcode + IDT[4] General-protection fault + IDT[5] TLB miss + IDT[6] Software interrupt (reserved for OS) + IDT[7-31] Platform interrupts (PIC, hard drive, keyboard, etc.) + + IDTMSK[0-31] Interupt mask, when interupt is entered the mask bit for the coorisponding interupt will be disabled. + The software is responsible for renabling the mask bit + +You get 32 :) +Also, I was think of making the OS handle TLP misses + + + + + +## Page Directory + +The page directory contains 1024 page tables that have 1024 entries. + +^ Stupid question: Do we need a page directory? Also I have a very limited size for cache, idt, tlb, etc. Plan on having around 100 Kbits + +### Page table layout + + PT[0] Present + PT[1] R/W + PT[2] User-mode + PT[3-4] RESERVED + PT[5] Accessed + PT[6-7] RESERVED + PT[8-31] Physical address of page table (XX * 2^16 + XXXX) + + *This is still WIP but I wanted to get your input on the layout. I also have + the jank memory offset that will more than likely change.* diff --git a/hdl_lab.tar.gz b/hdl_lab.tar.gz Binary files differdeleted file mode 100644 index dd937d6..0000000 --- a/hdl_lab.tar.gz +++ /dev/null |