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| author | jjsuperpower <jjs29356@gmail.com> | 2023-01-24 22:55:49 -0600 |
|---|---|---|
| committer | jjsuperpower <jjs29356@gmail.com> | 2023-01-24 22:55:49 -0600 |
| commit | 498380308fe45e35439c090a2d16ecf51c546d18 (patch) | |
| tree | 02a40169e18aeb6ec21dcb7b1506f0b1f5b118f2 /hdl/config.py | |
| parent | a888d4f92a5d19e4d132ea7d23c20d5f15652802 (diff) | |
working on reading control lines from csv
Diffstat (limited to 'hdl/config.py')
| -rw-r--r-- | hdl/config.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hdl/config.py b/hdl/config.py index 0ff2bc0..7bccd29 100644 --- a/hdl/config.py +++ b/hdl/config.py @@ -7,5 +7,6 @@ VERILOG_DIR = os.path.join(ROOT_DIR, 'gen_verilog') CXXRTL_DIR = os.path.join(ROOT_DIR, 'gen_cxxrtl') RTLIL_DIR = os.path.join(ROOT_DIR, 'gen_rtlil') VCD_DIR = os.path.join(ROOT_DIR, 'gen_vcd') +MACHINE_CODE_CSV = os.path.join(ROOT_DIR, 'core', 'machine_code.csv') NUM_RAND_TESTS = 100
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