1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
|
#include <kernel/idt.h>
#include <kernel/syscall.h>
#include <kernel/panic.h>
#include <kernel/gdt.h>
#include <kernel/asm.h>
#include <kernel/io.h>
#include <kernel/pic.h>
#include <kernel/string.h>
#include <kernel/paging.h>
#include <stdint.h>
__attribute__((aligned(0x10)))
struct idt_entry idt[256];
struct idt_ptr idtr;
const char* exceptions[] = {
"Division by zero",
"Debug",
"Non-maskable interrupt",
"Breakpoint",
"Overflow",
"Out-of-bounds",
"Invalid opcode",
"FPU not available",
"Double fault",
"RESERVED",
"Invalid TSS",
"Segment not present",
"Stack fault",
"General protection fault",
"Page fault",
"RESERVED",
"FPU exception",
"Alignment check",
"Machine check",
"FPU-SIMD exception",
"Virtualization exception",
"Control protection"
"RESERVED",
"Hypervisor injection",
"VMM exception",
"Security exception",
"RESERVED",
"Triple fault",
"RESERVED"
};
void exception_handler(struct regs *regs) {
switch (regs->isr_vector) {
case 0x00:
panic("Division by zero in kernel address space");
break;
case 0x06:
panic("Invalid opcode in kernel address space");
break;
case 0x08:
panic("Double fault in interrupt handler");
break;
case 0x0D:
panic("Protection fault in kernel address space");
break;
case 0x0E:
page_fault_handler(regs);
break;
default:
panic("Unhandled exception");
}
}
void interrupt_handler(struct regs regs) {
if (regs.isr_vector < 32) {
exception_handler(®s);
} else if (regs.isr_vector < 48) {
irq_dispatch(®s);
} else {
switch (regs.isr_vector) {
case 0x80:
handle_syscall(®s);
break;
default:
panic("Unmapped interrupt");
}
}
}
void idt_set_gate(uint8_t num, void (*handler)(void), uint16_t cs, uint8_t flags) {
struct idt_entry *desc = &idt[num];
desc->isr_low = (uint16_t)(((uint32_t)handler >> 0) & 0xFFFF);
desc->isr_high = (uint16_t)(((uint32_t)handler >> 16) & 0xFFFF);
desc->reserved = 0;
desc->kernel_cs = cs;
desc->flags = flags;
}
void idt_install(void) {
idtr.limit = (uint16_t)sizeof(struct idt_entry) * 256 - 1;
idtr.base = (uint32_t)idt;
idt_set_gate(0x0, isr_stub_0, 0x08, IDT_EXCEPTION);
idt_set_gate(0x1, isr_stub_1, 0x08, IDT_EXCEPTION);
idt_set_gate(0x2, isr_stub_2, 0x08, IDT_EXCEPTION);
idt_set_gate(0x3, isr_stub_3, 0x08, IDT_EXCEPTION);
idt_set_gate(0x4, isr_stub_4, 0x08, IDT_EXCEPTION);
idt_set_gate(0x5, isr_stub_5, 0x08, IDT_EXCEPTION);
idt_set_gate(0x6, isr_stub_6, 0x08, IDT_EXCEPTION);
idt_set_gate(0x7, isr_stub_7, 0x08, IDT_EXCEPTION);
idt_set_gate(0x8, isr_stub_8, 0x08, IDT_EXCEPTION);
idt_set_gate(0x9, isr_stub_9, 0x08, IDT_EXCEPTION);
idt_set_gate(0xA, isr_stub_10, 0x08, IDT_EXCEPTION);
idt_set_gate(0xB, isr_stub_11, 0x08, IDT_EXCEPTION);
idt_set_gate(0xC, isr_stub_12, 0x08, IDT_EXCEPTION);
idt_set_gate(0xD, isr_stub_13, 0x08, IDT_EXCEPTION);
idt_set_gate(0xE, isr_stub_14, 0x08, IDT_EXCEPTION);
idt_set_gate(0xF, isr_stub_15, 0x08, IDT_EXCEPTION);
idt_set_gate(0x10, isr_stub_16, 0x08, IDT_EXCEPTION);
idt_set_gate(0x11, isr_stub_17, 0x08, IDT_EXCEPTION);
idt_set_gate(0x12, isr_stub_18, 0x08, IDT_EXCEPTION);
idt_set_gate(0x13, isr_stub_19, 0x08, IDT_EXCEPTION);
idt_set_gate(0x14, isr_stub_20, 0x08, IDT_EXCEPTION);
idt_set_gate(0x15, isr_stub_21, 0x08, IDT_EXCEPTION);
idt_set_gate(0x16, isr_stub_22, 0x08, IDT_EXCEPTION);
idt_set_gate(0x17, isr_stub_23, 0x08, IDT_EXCEPTION);
idt_set_gate(0x18, isr_stub_24, 0x08, IDT_EXCEPTION);
idt_set_gate(0x19, isr_stub_25, 0x08, IDT_EXCEPTION);
idt_set_gate(0x1A, isr_stub_26, 0x08, IDT_EXCEPTION);
idt_set_gate(0x1B, isr_stub_27, 0x08, IDT_EXCEPTION);
idt_set_gate(0x1C, isr_stub_28, 0x08, IDT_EXCEPTION);
idt_set_gate(0x1D, isr_stub_29, 0x08, IDT_EXCEPTION);
idt_set_gate(0x1E, isr_stub_30, 0x08, IDT_EXCEPTION);
idt_set_gate(0x1F, isr_stub_31, 0x08, IDT_EXCEPTION);
idt_set_gate(0x20, irq_stub_0, 0x08, IDT_INTERRUPT);
idt_set_gate(0x21, irq_stub_1, 0x08, IDT_INTERRUPT);
idt_set_gate(0x22, irq_stub_2, 0x08, IDT_INTERRUPT);
idt_set_gate(0x23, irq_stub_3, 0x08, IDT_INTERRUPT);
idt_set_gate(0x24, irq_stub_4, 0x08, IDT_INTERRUPT);
idt_set_gate(0x25, irq_stub_5, 0x08, IDT_INTERRUPT);
idt_set_gate(0x26, irq_stub_6, 0x08, IDT_INTERRUPT);
idt_set_gate(0x27, irq_stub_7, 0x08, IDT_INTERRUPT);
idt_set_gate(0x28, irq_stub_8, 0x08, IDT_INTERRUPT);
idt_set_gate(0x29, irq_stub_9, 0x08, IDT_INTERRUPT);
idt_set_gate(0x2A, irq_stub_10, 0x08, IDT_INTERRUPT);
idt_set_gate(0x2B, irq_stub_11, 0x08, IDT_INTERRUPT);
idt_set_gate(0x2C, irq_stub_12, 0x08, IDT_INTERRUPT);
idt_set_gate(0x2D, irq_stub_13, 0x08, IDT_INTERRUPT);
idt_set_gate(0x2E, irq_stub_14, 0x08, IDT_INTERRUPT);
idt_set_gate(0x2F, irq_stub_15, 0x08, IDT_INTERRUPT);
idt_set_gate(0x80, syscall_stub, 0x08, IDT_INTERRUPT);
__asm__ volatile("lidt %0" : : "memory"(idtr));
}
|
