From 5a7dedee172dbb30f1053e303a5d984ef96fd001 Mon Sep 17 00:00:00 2001 From: jjsuperpower Date: Mon, 29 Aug 2022 20:39:19 -0500 Subject: fixed parity check --- hdl/template.py | 36 ------------------------------------ 1 file changed, 36 deletions(-) delete mode 100644 hdl/template.py (limited to 'hdl/template.py') diff --git a/hdl/template.py b/hdl/template.py deleted file mode 100644 index 64f0655..0000000 --- a/hdl/template.py +++ /dev/null @@ -1,36 +0,0 @@ -from amaranth import * -from amaranth.sim import Simulator, Settle, Delay - -from utils import cmd - -class Template(Elaboratable): - def __init__(self): - ... - - self.ports = [...] - - def elaborate(self, platform): - m = Module() - - ... - - return m - -def test(filename="out.vcd"): - dut = ... - - def proc1(): - ... - - - sim = Simulator(dut) - sim.add_clock(1e-6) - sim.add_sync_process(proc1) - - with sim.write_vcd(filename): - sim.run() - - -if __name__ == '__main__': - shift_reg = Template(...) - cmd(shift_reg, test) \ No newline at end of file -- cgit v1.2.3