From f2fa10954b481315e749ccb2da8ceb9bcce91723 Mon Sep 17 00:00:00 2001 From: jjsuperpower Date: Sat, 24 Sep 2022 15:04:21 -0500 Subject: fixed some ugly code --- hdl/core/jump_ctl.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'hdl/core/jump_ctl.py') diff --git a/hdl/core/jump_ctl.py b/hdl/core/jump_ctl.py index 6a7cf1b..468c2e3 100644 --- a/hdl/core/jump_ctl.py +++ b/hdl/core/jump_ctl.py @@ -2,7 +2,7 @@ from amaranth import * from amaranth.sim import Simulator, Settle, Delay from enum import Enum, unique -from hdl.utils import cmd, step, eval, sim, rand_bits_mix +from hdl.utils import * from hdl.lib.in_out_buff import InOutBuff # used for timing analysis from hdl.core.alu import ALUFlags, ALU, AluOpCodes #ALUOpCodes is for simulation only, not used in hardware @@ -20,7 +20,7 @@ class JumpOpCodes(Enum): class JumpCtl(Elaboratable): def __init__(self, **kargs): - self.alu_flags = Signal(ALU().alu_flags.width, reset_less=True) + self.alu_flags = Signal(len(ALUFlags), reset_less=True) self.op = Signal(3, reset_less=True) self.signed_bits = Signal(2, reset_less=True) -- cgit v1.2.3