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Diffstat (limited to 'hdl/testing/inc.v')
-rw-r--r-- | hdl/testing/inc.v | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/hdl/testing/inc.v b/hdl/testing/inc.v new file mode 100644 index 0000000..2f3291b --- /dev/null +++ b/hdl/testing/inc.v @@ -0,0 +1,39 @@ +// File: inc.v +// Generated by MyHDL 0.11 +// Date: Sun Jun 19 22:02:52 2022 + + +`timescale 1ns/10ps + +module inc ( + count, + enable, + clock, + reset +); +// Incrementer with enable. +// +// count -- output +// enable -- control input, increment when 1 +// clock -- clock input +// reset -- asynchronous reset input + +output [7:0] count; +reg [7:0] count; +input enable; +input clock; +input reset; + + +always @(posedge clock, negedge reset) begin: INC_SEQ + if (reset == 0) begin + count <= 0; + end + else begin + if (enable) begin + count <= (count + 1); + end + end +end + +endmodule |