diff options
author | jjsuperpower <jjs29356@gmail.com> | 2022-10-21 22:42:49 -0500 |
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committer | jjsuperpower <jjs29356@gmail.com> | 2022-10-21 22:42:49 -0500 |
commit | b20b36d5418bb65556a2bb6e8890045f7e253fc8 (patch) | |
tree | 7f02ae7fbd65d83e1e3459728ae5126214790425 /hdl | |
parent | 1f3acae2ab8b975f6d475824643acf3809eeece5 (diff) |
added jump always, match ISA
Diffstat (limited to 'hdl')
-rw-r--r-- | hdl/core/jump_ctl.py | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/hdl/core/jump_ctl.py b/hdl/core/jump_ctl.py index 94dd8f2..6f02afe 100644 --- a/hdl/core/jump_ctl.py +++ b/hdl/core/jump_ctl.py @@ -10,12 +10,13 @@ from hdl.config import NUM_RAND_TESTS @unique class JumpOpCodes(Enum): - j_eq = 0 - j_ne = 1 - j_lt_u = 2 - j_lte_u = 3 - j_lt_s = 4 - j_lte_s = 5 + j_t = 0 + j_eq = 1 + j_ne = 2 + j_lt_u = 3 + j_lte_u = 4 + j_lt_s = 5 + j_lte_s = 6 class JumpCtl(Elaboratable): def __init__(self, **kargs): @@ -48,6 +49,9 @@ class JumpCtl(Elaboratable): # e.g. in1 less than in2 # this is done by in1 - in2 and reading the negative and zero flags with m.Switch(self.op): + with m.Case(JumpOpCodes.j_t.value): + m.d.comb += self.cond_true.eq(1) # always true + with m.Case(JumpOpCodes.j_eq.value): m.d.comb += self.cond_true.eq(self.alu_flags[ALUFlags.zero.value]) |